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 HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S
Data Sheet May 1999 File Number
4656.2
600V, SMPS Series N-Channel IGBT
The HGTP12N60A4, HGTG12N60A4 and HGT1S12N60A4S are MOS gated high voltage switching devices combining the best features of MOSFETs and bipolar transistors. These devices have the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 25oC and 150oC. This IGBT is ideal for many high voltage switching applications operating at high frequencies where low conduction losses are essential. This device has been optimized for high frequency switch mode power supplies. Formerly Developmental Type TA49335.
Features
* >100kHz Operation at 390V, 12A * 200kHz Operation at 390V, 9A * 600V Switching SOA Capability * Typical Fall Time. . . . . . . . . . . . . . . . . 70ns at TJ = 125oC * Low Conduction Loss * Temperature Compensating SABER Model http://www.intersil.com * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards
Ordering Information
PART NUMBER HGTP12N60A4 HGTG12N60A4 HGT1S12N60A4S PACKAGE TO-220AB TO-247 TO-263AB BRAND 12N60A4 12N60A4 12N60A4
Packaging
JEDEC TO-220AB ALTERNATE VERSION
E COLLECTOR (FLANGE) C G
NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in tape and reel, e.g. HGT1S12N60A4S9A JEDEC TO-263AB
Symbol
C COLLECTOR (FLANGE) G E G
JEDEC STYLE TO-247
E E C G
COLLECTOR (FLANGE)
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,587,713 4,641,162 4,794,432 4,860,080 4,969,027 4,417,385 4,598,461 4,644,637 4,801,986 4,883,767 4,430,792 4,605,948 4,682,195 4,803,533 4,888,627 4,443,931 4,618,872 4,684,413 4,809,045 4,890,143 4,466,176 4,620,211 4,694,313 4,809,047 4,901,127 4,516,143 4,631,564 4,717,679 4,810,665 4,904,609 4,532,534 4,639,754 4,743,952 4,823,176 4,933,740 4,567,641 4,639,762 4,783,690 4,837,606 4,963,951
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4SSP
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified HGTG12N60A4, HGTP12N60A4, HGT1S12N60A4S 600 54 23 96 20 30 60A at 600V 167 1.33 -55 to 150 300 260 UNITS V A A A V V W W/oC oC
oC oC
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .C110 Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . SSOA Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . TJ, TSTG Maximum Lead Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . TPKG
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. Pulse width limited by maximum junction temperature.
Electrical Specifications
PARAMETER
TJ = 25oC, Unless Otherwise Specified SYMBOL BVCES BVECS ICES TEST CONDITIONS IC = 250A, VGE = 0V IC = 10mA, VGE = 0V VCE = 600V TJ = 25oC TJ = 125oC TJ = 25oC TJ = 125oC MIN 600 10 60 TYP 2.0 1.6 5.6 8 78 97 17 8 96 18 55 160 50 MAX 250 2.0 2.7 2.0 250 96 120 UNITS V V A mA V V V nA A V nC nC ns ns ns ns J J J
Collector to Emitter Breakdown Voltage Emitter to Collector Breakdown Voltage Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
VCE(SAT)
IC = 12A, VGE = 15V
Gate to Emitter Threshold Voltage Gate to Emitter Leakage Current Switching SOA Gate to Emitter Plateau Voltage On-State Gate Charge
VGE(TH) IGES SSOA VGEP Qg(ON)
IC = 250A, VCE = 600V VGE = 20V TJ = 150oC, RG = 10, VGE = 15V L = 100H, VCE = 600V IC = 12A, VCE = 300V IC = 12A, VCE = 300V VGE = 15V VGE = 20V
Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 3) Turn-On Energy (Note 3) Turn-Off Energy (Note 2)
td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF
IGBT and Diode at TJ = 25oC ICE = 12A VCE = 390V VGE =15V RG = 10 L = 500H Test Circuit - (Figure 20)
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HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4SPD
Electrical Specifications
PARAMETER Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 3) Turn-On Energy (Note 3) Turn-Off Energy (Note 2) Thermal Resistance Junction To Case NOTES: 2. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. 3. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in Figure 20. TJ = 25oC, Unless Otherwise Specified (Continued) SYMBOL td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF RJC TEST CONDITIONS IGBT and Diode at TJ = 125oC ICE = 12A VCE = 390V VGE = 15V RG = 10 L = 500H Test Circuit - (Figure 20) MIN TYP 17 16 110 70 55 250 175 MAX 170 95 350 285 0.75 UNITS ns ns ns ns J J J
oC/W
Typical Performance Curves
60 ICE , DC COLLECTOR CURRENT (A)
Unless Otherwise Specified
ICE, COLLECTOR TO EMITTER CURRENT (A) 70 60 50 40 30 20 10 0 0 100 200 300 400 500 600 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 700
VGE = 15V 50 40 30 20 10 0 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC)
TJ = 150oC, RG = 10, VGE = 15V, L = 200H
FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE
500 fMAX, OPERATING FREQUENCY (kHz) 300 TC 75oC VGE 15V
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
tSC , SHORT CIRCUIT WITHSTAND TIME (s)
20 18 16 14 12 10 8 6 4 2 0 9
VCE = 390V, RG = 10, TJ = 125oC
300 275 250 ISC 225 200 175 150 tSC 125 100 75
100
fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON2 + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) ROJC = 0.75oC/W, SEE NOTES
TJ = 125oC, RG = 10, L = 500H, V CE = 390V 10 1 3 10 20 30
10
11
12
13
14
15
50
ICE, COLLECTOR TO EMITTER CURRENT (A)
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
3
ISC, PEAK SHORT CIRCUIT CURRENT (A)
HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S Typical Performance Curves
ICE, COLLECTOR TO EMITTER CURRENT (A) 24 DUTY CYCLE < 0.5%, VGE = 12V PULSE DURATION = 250s 20 16 TJ = 150oC 12 TJ = 125oC 8 TJ = 25oC 4 0
Unless Otherwise Specified (Continued)
ICE, COLLECTOR TO EMITTER CURRENT (A)
24 20 16 12 8 4 0
DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250s
TJ = 150oC TJ = 125oC
TJ = 25oC
0
1.5 2 0.5 1.0 VCE, COLLECTOR TO EMITTER VOLTAGE (V)
2.5
0
0.5
1.0
1.5
2
2.5
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
700 EON2 , TURN-ON ENERGY LOSS (J) 600 500 400 300 200 100 0
EOFF, TURN-OFF ENERGY LOSS (J)
RG = 10, L = 500H, VCE = 390V
400 RG = 10, L = 500H, VCE = 390V 350 300 250 200 150 100 50 0 2 4 6 8 10 12 TJ = 25oC, VGE = 12V OR 15V 14 16 18 20 22 24 TJ = 125oC, VGE = 12V OR 15V
TJ = 125oC, VGE = 12V, VGE = 15V
TJ = 25oC, VGE = 12V, VGE = 15V
2
4
6 8 10 12 14 16 18 20 22 ICE , COLLECTOR TO EMITTER CURRENT (A)
24
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT
18 td(ON)I, TURN-ON DELAY TIME (ns) 17
RG = 10, L = 500H, VCE = 390V
32 RG = 10, L = 500H, VCE = 390V 28 trI , RISE TIME (ns) 24 20 16 12 8 TJ = 25oC OR TJ = 125oC, VGE = 15V TJ = 125oC, OR TJ = 25oC, VGE = 12V
16 15 14 13 12 11 10 2 4 6 8 10 12 14 16 18 20 22 24 TJ = 25oC, TJ = 125oC, VGE = 15V TJ = 25oC, TJ = 125oC, VGE = 12V
4 0 2 4 6 8
10
12
14
16
18
20
22
24
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT
4
HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S Typical Performance Curves
td(OFF)I , TURN-OFF DELAY TIME (ns) 115 RG = 10, L = 500H, VCE = 390V 110 105 100 95 VGE = 12V, VGE = 15V, TJ = 25oC 90 20 85 2 4 6 8 10 12 14 16 18 20 22 24 ICE , COLLECTOR TO EMITTER CURRENT (A) 10 2 4 6 8 10 12 14 16 18 20 22 24 tfI , FALL TIME (ns) VGE = 12V, VGE = 15V, TJ = 125oC 80 70 60 50 40 30 TJ = 25oC, VGE = 12V OR 15V TJ = 125oC, VGE = 12V OR 15V
Unless Otherwise Specified (Continued)
90
RG = 10, L = 500H, VCE = 390V
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT
ICE, COLLECTOR TO EMITTER CURRENT (A)
250 VGE, GATE TO EMITTER VOLTAGE (V) DUTY CYCLE < 0.5%, VCE = 10V PULSE DURATION = 250s 200 TJ = 25oC TJ = -55oC TJ = 125oC 100
16 14 12 10 8 6 4 2 0 0
IG(REF) = 1mA, RL = 25, TC = 25oC
VCE = 600V
VCE = 400V
150
VCE = 200V
50
0 6 7 8 11 14 9 10 12 13 VGE, GATE TO EMITTER VOLTAGE (V) 15 16
10
20
30 40 50 60 QG , GATE CHARGE (nC)
70
80
FIGURE 13. TRANSFER CHARACTERISTIC
ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ)
FIGURE 14. GATE CHARGE WAVEFORMS
RG = 10, L = 500H, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF
ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ)
1.2 1.0 0.8
10
TJ = 125oC, L = 500H, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF
ICE = 24A 0.6 0.4 ICE = 12A 0.2 ICE = 6A 0 25 50 75 100 125 150
ICE = 24A 1 ICE = 12A ICE = 6A
0.1 5 10 100 RG, GATE RESISTANCE () 1000
TC , CASE TEMPERATURE (oC)
FIGURE 15. TOTAL SWITCHING LOSS vs CASE TEMPERATURE
FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
5
HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S Typical Performance Curves
3.0 FREQUENCY = 1MHz C, CAPACITANCE (nF) 2.5 2.0 CIES 1.5 1.0 COES 0.5 CRES 0 0 5 10 15 20 25 VCE, COLLECTOR TO EMITTER VOLTAGE (V)
Unless Otherwise Specified (Continued)
VCE, COLLECTOR TO EMITTER VOLTAGE (V) 2.4 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250s, TJ = 25oC 2.3
2.2 ICE = 18A 2.1 ICE = 12A
2.0 ICE = 6A 1.9 8 9 10 11 12 13 14 15 16 VGE, GATE TO EMITTER VOLTAGE (V)
FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE
FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE vs GATE TO EMITTER VOLTAGE
ZJC , NORMALIZED THERMAL RESPONSE
100 0.5 0.2 0.1 10-1 0.05 0.02 0.01 SINGLE PULSE 10-2 -5 10 10-4 10-3 10-2 10-1 PD t2 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZJC X RJC) + TC 100 101 t1
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
Test Circuit and Waveforms
RHRP660 90% VGE L = 500H VCE RG = 10 + ICE VDD = 390V 90% 10% td(OFF)I tfI trI td(ON)I EOFF 10% EON2
-
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 21. SWITCHING TEST WAVEFORMS
6
HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to gateinsulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler's body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as "ECCOSORBDTM LD26" or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended.
Operating Frequency Information
Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 21. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0).
7
ECCOSORBDTM is a trademark of Emerson and Cumming, Inc.
HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S TO-263AB
H1 TERM. 4 D
SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
E A A1
L2 L1 1 3
L
b e e1
TERM. 4
b1
J1 0.450 (11.43)
c
L3
b2
0.700 (17.78)
0.350 (8.89)
3
1 0.080 TYP (2.03) 0.062 TYP (1.58)
0.150 (3.81)
MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS
INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 A1 0.048 0.052 1.22 1.32 4, 5 b 0.030 0.034 0.77 0.86 4, 5 b1 0.045 0.055 1.15 1.39 4, 5 b2 0.310 7.88 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 E 0.395 0.405 10.04 10.28 e 0.100 TYP 2.54 TYP 7 e1 0.200 BSC 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 J1 0.095 0.105 2.42 2.66 L 0.175 0.195 4.45 4.95 L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 8.01 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 11 dated 5-99.
1.5mm DIA. HOLE
4.0mm USER DIRECTION OF FEED 2.0mm 1.75mm C L
TO-263AB
24mm TAPE AND REEL
24mm
16mm
COVER TAPE
40mm MIN. ACCESS HOLE 30.4mm
13mm 330mm 100mm
GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. 24.4mm
8
HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S TO-247
3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE
E A OS Q OR D TERM. 4 OP
INCHES SYMBOL A b b1 b2 c D MIN 0.180 0.046 0.060 0.095 0.020 0.800 0.605 MAX 0.190 0.051 0.070 0.105 0.026 0.820 0.625
MILLIMETERS MIN 4.58 1.17 1.53 2.42 0.51 20.32 15.37 MAX 4.82 1.29 1.77 2.66 0.66 20.82 15.87 NOTES 2, 3 1, 2 1, 2 1, 2, 3 4 4 5 1 -
L1 L
b1 b2 c b
1 2 3 J1 3 2 1
E e e1 J1 L L1 OP Q OR
0.219 TYP 0.438 BSC 0.090 0.620 0.145 0.138 0.210 0.195 0.260 0.105 0.640 0.155 0.144 0.220 0.205 0.270
5.56 TYP 11.12 BSC 2.29 15.75 3.69 3.51 5.34 4.96 6.61 2.66 16.25 3.93 3.65 5.58 5.20 6.85
e e1
BACK VIEW
LEAD 1 LEAD 2 LEAD 3 TERM. 4
- GATE - COLLECTOR - EMITTER - COLLECTOR
OS
NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93.
9
HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S
TO-220AB (Alternate Version)
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
OP E Q H1 D TERM. 4 A A1
INCHES SYMBOL A A1 b b1 c D MIN 0.170 0.048 0.030 0.045 0.018 0.590 0.395 MAX 0.180 0.052 0.034 0.055 0.022 0.610 0.405
MILLIMETERS MIN 4.32 1.22 0.77 1.15 0.46 14.99 10.04 MAX 4.57 1.32 0.86 1.39 0.55 15.49 10.28 NOTES 2, 4 2, 4 2, 4 2, 4 5 5 6 3 -
L1
b1 c b
E e e1
L 60o 1 2 3
0.100 TYP 0.200 BSC 0.235 0.095 0.530 0.110 0.149 0.105 0.255 0.105 0.550 0.130 0.153 0.115
2.54 TYP 5.08 BSC 5.97 2.42 13.47 2.80 3.79 2.66 6.47 2.66 13.97 3.30 3.88 2.92
H1 e e1
J1
J1 L L1 OP Q
NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Dimension (without solder). 3. Solder finish uncontrolled in this area. 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 3 dated 7-97.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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